Dealing with one small bottleneck

64Kb Grade-1 F-RAM

64Kb Grade-1 F-RAM

One subject that will probably never make the front page of newspapers is the speed of automotive grade nonvolatile memory. The sentence alone is enough to compel 99.9% of the world’s population to choose to watch paint dry rather than read on. However, for those of us working in automotive electronics that strive for faster, cheaper, and better designs, the speed of nonvolatile memory becomes a serious concern worthy of attention.

Nonvolatile memory for automotive applications is usually an SPI device running at a bus speed of 1- to 5-MHz. So why does an automotive memory run slower than an SPI memory in the industrial world, especially when you consider that the typical automotive grade memory is made from the same silicon as an industrial device? In a nutshell, it comes down to higher operating temperature. Operating temperature effects both speed and power consumption. Since the two effects are related, higher temperatures slow down the operating speed of silicon and increase the current consumption. The end results are slower speed and higher current consumption specifications than a comparable industrial device. We’ll talk about the increased current another time so let’s just focus on the slower operating speed of nonvolatile memory in automotive applications for now.

I have recently come across a couple of instances where my customers needed more speed from their nonvolatile memory. One design had an array of devices on an SPI bus. Unfortunately, due to the slowness of the nonvolatile memory, the speed of the SPI bus needed to be reduced for nonvolatile memory reads and writes and then switched back to a higher speed for all other peripherals. The time needed to switch speeds made the whole design dillema worse. The design would be much easier if the nonvolatile memory was as fast the rest of the parts on the SPI bus, like an F-RAM for example.

Another design had a control algorithm that needed to execute in one millisecond to achieve stable control. Another  requirement was the need to store data in nonvolatile memory on each pass trough the control algorithm. EEPROM was not up to the task since it is not able to deliver writes in under one millisecond. F-RAM, on the other hand, is capable of writing as fast as the SPI bus can deliver data, making it an ideal solution for the design.

Simply, F-RAM reads and writes at the full SPI bus speed of 16MHz (for the 64K Grade 1 part) allowing engineers to make a small step towards their holy grail – faster, cheaper, better designs.

What’s the value of development time?

One of the features of F-RAM is very high endurance. It’s so high in fact that you can write as many times you like if you are using an F-RAM device over a serial bus. Simply put, serial busses are not fast enough to ever reach the endurance limit of F-RAM. This allows engineers to re-think their non-volatile memory strategy and entirely eliminate routines that perform wear-leveling and data saves on power fail.

Wear-leveling is commonly used for Flash or EEPROM parts to ensure that the application does not exceed their typical 1-million write cycle specification. With F-RAM’s 100 trillion cycles, in real world applications, you will never reach the endurance limit.

If (Saving_Data_on_Power_Fail) = Difficult Then
         Call Save_Data_Whenever_it_Changes_Instead(VirtuallyUnlimitedEndurance);
Endif;

There is another way that F-RAM’s high endurance can save development effort. A lot of systems need to save data upon power failure. This requires extra hardware to perform an early detection of the power fail as well as some software to control the reaction. The power fail software needs to be written and tested, both of which require engineering time. At this point I should throw in lots of warnings about slow power ramps with noise and power glitches that cause problematic detection of a power fail. The faster you save the data the better!

Saving the time and effort to write and test software for wear leveling and data saves on power fail is valuable. A customer recently said that removing both of these tasks from his schedule would save him three months.  How much money could you save if you eliminated several months of development time? Generally speaking, I don’t have a precise answer, so here is my challenge. If you are an engineer, go and ask your boss how much extra your company can add to the BOM cost for ABC if it saves you X person-months of development effort!

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